Support iGPU GTT memory and inference servers on iGPUs #34
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Requested by the operator. breadram currently reports device memory as unknown and only accounts host RSS and cgroup memory, so a model loaded on an integrated GPU (shared system memory) is invisible or misattributed, and an iGPU inference server cannot be reasoned about.
How it was found
Direct operator request: "breadram needs to support iGPU GTT memory and inference servers using iGPUs".
Scope
mem_info_gtt_used/mem_info_gtt_total, and amdgpumem_info_gtt_usedwhere present, from sysfs/drm, bounded and read-only.Acceptance
Notes
Distinct from host RAM and from discrete VRAM: on an iGPU the "device" memory is a carve-out of system RAM, so it must be counted once, not twice.
Started. First piece published on
feature/ram-67-igpu-gtt.PR: #35
What landed: reads and reports integrated GPU shared memory. GTT used and total are read from the drm class, bounded and read-only, summed across cards, carried in the memory breakdown as gtt_used_bytes and gtt_total_bytes (protocol minor 7, defaulted), shown by breadram diagnostics, and exposed as the gpu_gtt capability with honest degradation. Missing is never zero.
Still to come: attributing an iGPU-backed model's footprint through the inference adapters so an otherwise idle workload is not released while it holds a loaded iGPU model, counting the carve-out once when it overlaps cgroup accounting, and exercising it against a real iGPU host. The PR body says Part of RAM-67.
Live evidence for the telemetry piece, on a real iGPU host.
This host has an AMD integrated GPU (card1, vendor 0x1002, amdgpu). Running
breadramd --mode monitoron the branch and thenbreadram diagnostics:The JSON report carries gtt_used_bytes 8074977280 and gtt_total_bytes 32892583936. Recorded in docs/IGPU.md. Still untested on i915 or xe.
Inference attribution landed on the same branch (PR #35).
A provider that runs on an integrated GPU is now marked in the configuration with
igpu = true(a new ProviderEndpoint field, default false). With it set, the Ollama adapter attributes a loaded model's reported device memory to host RAM, because on an iGPU it is a carve-out of system memory rather than dedicated VRAM, and it reports no separate device figure. The registry passes the flag through and records a note saying which way the endpoint was attributed. A test asserts the attribution against the two-model fixture. docs/IGPU.md documents the flag and why it matters: counting the carve-out as device memory would hide where it really lives and could let a relief decision treat the host as holding less than it does.Remaining, honestly:
Verification: cargo fmt --all --check, cargo clippy --workspace --all-targets --locked -- -D warnings, cargo build --workspace --locked, cargo test --workspace --locked all pass.
The count-once invariant landed on the same branch (PR #35 head
a9de8f9): GTT is reported in its own field and never folded into host available memory, because on an iGPU it is a carve-out of the same RAM. A daemon test asserts the breakdown copies the GTT figure and leaves ram_available_bytes exactly as the kernel reported it, and the notes say the two are separate.That leaves one item on this card: exercise the reading on a non-amdgpu driver host (i915 or xe). This host is amdgpu and verified live; i915/xe expose the same mem_info_gtt_* attribute but that is reference material, not a reading taken here. That is a hardware-gated item, so the card is otherwise complete for the hardware available. Moving it to review.
Blocked: PR #35 conflicts with main, needs a rebase. Not merged.
CI is green on head
a9de8f9(CPU checks / check). The blocker is a merge conflict, not the change. The branch is based on2f4e2f3, one commit behind main, which now carriesbaebd12"Support containerized and system-service workloads". A trial merge of origin/main into feature/ram-67-igpu-gtt fails on a single file, crates/breadram-core/src/ipc.rs, at two hunks (both the protocol minor bump):PROTOCOL_MINORat ipc.rs:37: main sets it to 6 ("per workload effective memory limit"), the branch sets it to 7 ("integrated GPU shared memory"). The branch's doc comment already carries main's minor-6 wording, so the right resolution keeps 7.assert_eq!(PROTOCOL_MINOR, ...)in the testa_diagnostics_payload_from_the_previous_minor_version_still_decodes(ipc.rs around 985-1000), same 6-vs-7 clash.Everything else auto-merges. Main's other unrelated ipc.rs addition,
WorkloadSummary.limit_bytes, is in a separate hunk and survives the rebase untouched.To unblock: on
feature/ram-67-igpu-gtt,git fetch origin && git rebase origin/main, resolve ipc.rs to minor 7 (keeping main'slimit_bytes), and push to the same branch. PR #35 updates in place; do not open a second PR for this key.Nothing else was flagged in the diff. Against RAM-67 the change reads as complete for the hardware present: the GTT counter read with the per-card sum and honest unknown/absent degradation, the
gpu_gttcapability, the breakdown plus human and JSON diagnostics, theigpuprovider flag that attributes an iGPU model's device memory to host RAM, and the count-once invariant test. The remaining item (a live reading on an i915 or xe host) stays hardware gated.Leaving this card in review pending the rebase.
Rebased onto main (
baebd12) as the review asked. The only conflict was the protocol minor bump in ipc.rs; resolved to keep 7 (integrated GPU shared memory) with 6 (per workload effective memory limit) already above it, and the older-payload test asserts 7. Head is now2ff1108, full check set green. Ready to merge.Reviewed and merged. PR #35 squashed onto main as
b38f03b, branch deleted. CI was green on the rebased head2ff1108(CPU checks / check), the PR was mergeable, and each RAM-67 acceptance point is met:Minor, non-blocking notes, suggested as a follow-up card rather than rework:
Merging to done.